6502 Instruction Reference

Instruction Reference

Click on any of following links to go straight to the information for that instruction.

ADCANDASLBCCBCSBEQBITBMIBNEBPLBRKBVCBVSCLC
CLDCLICLVCMPCPXCPYDECDEXDEYEORINCINXINYJMP
JSRLDALDXLDYLSRNOPORAPHAPHPPLAPLPROLRORRTI
RTSSBCSECSEDSEISTASTXSTYTAXTAYTSXTXATXSTYA

ADC – Add with Carry

A,Z,C,N = A+M+C

This instruction adds the contents of a memory location to the accumulator together with the carry bit. If overflow occurs the carry bit is set, this enables multiple byte addition to be performed.

Processor Status after use:

CCarry FlagSet if overflow in bit 7
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagSet if sign bit is incorrect
NNegative FlagSet if bit 7 set
Addressing ModeOpcodeBytesCycles
Immediate$6922
Zero Page$6523
Zero Page,X$7524
Absolute$6D34
Absolute,X$7D34 (+1 if page crossed)
Absolute,Y$7934 (+1 if page crossed)
(Indirect,X)$6126
(Indirect),Y$7125 (+1 if page crossed)

See also: SBC

AND – Logical AND

A,Z,N = A&M

A logical AND is performed, bit by bit, on the accumulator contents using the contents of a byte of memory.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 set
Addressing ModeOpcodeBytesCycles
Immediate$2922
Zero Page$2523
Zero Page,X$3524
Absolute$2D34
Absolute,X$3D34 (+1 if page crossed)
Absolute,Y$3934 (+1 if page crossed)
(Indirect,X)$2126
(Indirect),Y$3125 (+1 if page crossed)

See also: EORORA

ASL – Arithmetic Shift Left

A,Z,C,N = M*2 or M,Z,C,N = M*2

This operation shifts all the bits of the accumulator or memory contents one bit left. Bit 0 is set to 0 and bit 7 is placed in the carry flag. The effect of this operation is to multiply the memory contents by 2 (ignoring 2’s complement considerations), setting the carry if the result will not fit in 8 bits.

Processor Status after use:

CCarry FlagSet to contents of old bit 7
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Accumulator$0A12
Zero Page$0625
Zero Page,X$1626
Absolute$0E36
Absolute,X$1E37

See also: LSRROLROR

BCC – Branch if Carry Clear

If the carry flag is clear then add the relative displacement to the program counter to cause a branch to a new location.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Relative$9022 (+1 if branch succeeds
+2 if to a new page)

See also: BCS

BCS – Branch if Carry Set

If the carry flag is set then add the relative displacement to the program counter to cause a branch to a new location.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Relative$B022 (+1 if branch succeeds
+2 if to a new page)

See also: BCC

BEQ – Branch if Equal

If the zero flag is set then add the relative displacement to the program counter to cause a branch to a new location.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Relative$F022 (+1 if branch succeeds
+2 if to a new page)

See also: BNE

BIT – Bit Test

A & M, N = M7, V = M6

This instructions is used to test if one or more bits are set in a target memory location. The mask pattern in A is ANDed with the value in memory to set or clear the zero flag, but the result is not kept. Bits 7 and 6 of the value from memory are copied into the N and V flags.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if the result if the AND is zero
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagSet to bit 6 of the memory value
NNegative FlagSet to bit 7 of the memory value
Addressing ModeOpcodeBytesCycles
Zero Page$2423
Absolute$2C34

BMI – Branch if Minus

If the negative flag is set then add the relative displacement to the program counter to cause a branch to a new location.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Relative$3022 (+1 if branch succeeds
+2 if to a new page)

See also: BPL

BNE – Branch if Not Equal

If the zero flag is clear then add the relative displacement to the program counter to cause a branch to a new location.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Relative$D022 (+1 if branch succeeds
+2 if to a new page)

See also: BEQ

BPL – Branch if Positive

If the negative flag is clear then add the relative displacement to the program counter to cause a branch to a new location.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Relative$1022 (+1 if branch succeeds
+2 if to a new page)

See also: BMI

BRK – Force Interrupt

The BRK instruction forces the generation of an interrupt request. The program counter and processor status are pushed on the stack then the IRQ interrupt vector at $FFFE/F is loaded into the PC and the break flag in the status set to one.

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandSet to 1
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$0017

The interpretation of a BRK depends on the operating system. On the BBC Microcomputer it is used by language ROMs to signal run time errors but it could be used for other purposes (e.g. calling operating system functions, etc.).

BVC – Branch if Overflow Clear

If the overflow flag is clear then add the relative displacement to the program counter to cause a branch to a new location.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Relative$5022 (+1 if branch succeeds
+2 if to a new page)

See also: BVS

BVS – Branch if Overflow Set

If the overflow flag is set then add the relative displacement to the program counter to cause a branch to a new location.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Relative$7022 (+1 if branch succeeds
+2 if to a new page)

See also: BVC

CLC – Clear Carry Flag

C = 0

Set the carry flag to zero.

CCarry FlagSet to 0
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$1812

See also: SEC

CLD – Clear Decimal Mode

D = 0

Sets the decimal mode flag to zero.

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagSet to 0
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$D812

NB:
The state of the decimal flag is uncertain when the CPU is powered up and it is not reset when an interrupt is generated. In both cases you should include an explicit CLD to ensure that the flag is cleared before performing addition or subtraction.

See also: SED

CLI – Clear Interrupt Disable

I = 0

Clears the interrupt disable flag allowing normal interrupt requests to be serviced.

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableSet to 0
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$5812

See also: SEI

CLV – Clear Overflow Flag

V = 0

Clears the overflow flag.

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagSet to 0
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$B812

CMP – Compare

Z,C,N = A-M

This instruction compares the contents of the accumulator with another memory held value and sets the zero and carry flags as appropriate.

Processor Status after use:

CCarry FlagSet if A >= M
ZZero FlagSet if A = M
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Immediate$C922
Zero Page$C523
Zero Page,X$D524
Absolute$CD34
Absolute,X$DD34 (+1 if page crossed)
Absolute,Y$D934 (+1 if page crossed)
(Indirect,X)$C126
(Indirect),Y$D125 (+1 if page crossed)

See also: CPXCPY

CPX – Compare X Register

Z,C,N = X-M

This instruction compares the contents of the X register with another memory held value and sets the zero and carry flags as appropriate.

Processor Status after use:

CCarry FlagSet if X >= M
ZZero FlagSet if X = M
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Immediate$E022
Zero Page$E423
Absolute$EC34

See also: CMPCPY

CPY – Compare Y Register

Z,C,N = Y-M

This instruction compares the contents of the Y register with another memory held value and sets the zero and carry flags as appropriate.

Processor Status after use:

CCarry FlagSet if Y >= M
ZZero FlagSet if Y = M
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Immediate$C022
Zero Page$C423
Absolute$CC34

See also: CMPCPX

DEC – Decrement Memory

M,Z,N = M-1

Subtracts one from the value held at a specified memory location setting the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if result is zero
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Zero Page$C625
Zero Page,X$D626
Absolute$CE36
Absolute,X$DE37

See also: DEXDEY

DEX – Decrement X Register

X,Z,N = X-1

Subtracts one from the X register setting the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if X is zero
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of X is set
Addressing ModeOpcodeBytesCycles
Implied$CA12

See also: DECDEY

DEY – Decrement Y Register

Y,Z,N = Y-1

Subtracts one from the Y register setting the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if Y is zero
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of Y is set
Addressing ModeOpcodeBytesCycles
Implied$8812

See also: DECDEX

EOR – Exclusive OR

A,Z,N = A^M

An exclusive OR is performed, bit by bit, on the accumulator contents using the contents of a byte of memory.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 set
Addressing ModeOpcodeBytesCycles
Immediate$4922
Zero Page$4523
Zero Page,X$5524
Absolute$4D34
Absolute,X$5D34 (+1 if page crossed)
Absolute,Y$5934 (+1 if page crossed)
(Indirect,X)$4126
(Indirect),Y$5125 (+1 if page crossed)

See also: ANDORA

INC – Increment Memory

M,Z,N = M+1

Adds one to the value held at a specified memory location setting the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if result is zero
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Zero Page$E625
Zero Page,X$F626
Absolute$EE36
Absolute,X$FE37

See also: INXINY

INX – Increment X Register

X,Z,N = X+1

Adds one to the X register setting the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if X is zero
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of X is set
Addressing ModeOpcodeBytesCycles
Implied$E812

See also: INCINY

INY – Increment Y Register

Y,Z,N = Y+1

Adds one to the Y register setting the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if Y is zero
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of Y is set
Addressing ModeOpcodeBytesCycles
Implied$C812

See also: INCINX

JMP – Jump

Sets the program counter to the address specified by the operand.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Absolute$4C33
Indirect $6C35

NB:
An original 6502 has does not correctly fetch the target address if the indirect vector falls on a page boundary (e.g. $xxFF where xx is any value from $00 to $FF). In this case fetches the LSB from $xxFF as expected but takes the MSB from $xx00. This is fixed in some later chips like the 65SC02 so for compatibility always ensure the indirect vector is not at the end of the page.

JSR – Jump to Subroutine

The JSR instruction pushes the address (minus one) of the return point on to the stack and then sets the program counter to the target memory address.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Absolute$2036

See also: RTS

LDA – Load Accumulator

A,Z,N = M

Loads a byte of memory into the accumulator setting the zero and negative flags as appropriate.

CCarry FlagNot affected
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of A is set
Addressing ModeOpcodeBytesCycles
Immediate$A922
Zero Page$A523
Zero Page,X$B524
Absolute$AD34
Absolute,X$BD34 (+1 if page crossed)
Absolute,Y$B934 (+1 if page crossed)
(Indirect,X)$A126
(Indirect),Y$B125 (+1 if page crossed)

See also: LDXLDY

LDX – Load X Register

X,Z,N = M

Loads a byte of memory into the X register setting the zero and negative flags as appropriate.

CCarry FlagNot affected
ZZero FlagSet if X = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of X is set
Addressing ModeOpcodeBytesCycles
Immediate$A222
Zero Page$A623
Zero Page,Y$B624
Absolute$AE34
Absolute,Y$BE34 (+1 if page crossed)

See also: LDALDY

LDY – Load Y Register

Y,Z,N = M

Loads a byte of memory into the Y register setting the zero and negative flags as appropriate.

CCarry FlagNot affected
ZZero FlagSet if Y = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of Y is set
Addressing ModeOpcodeBytesCycles
Immediate$A022
Zero Page$A423
Zero Page,X$B424
Absolute$AC34
Absolute,X$BC34 (+1 if page crossed)

See also: LDALDX

LSR – Logical Shift Right

A,C,Z,N = A/2 or M,C,Z,N = M/2

Each of the bits in A or M is shift one place to the right. The bit that was in bit 0 is shifted into the carry flag. Bit 7 is set to zero.

Processor Status after use:

CCarry FlagSet to contents of old bit 0
ZZero FlagSet if result = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Accumulator$4A12
Zero Page$4625
Zero Page,X$5626
Absolute$4E36
Absolute,X$5E37

See also: ASLROLROR

NOP – No Operation

The NOP instruction causes no changes to the processor other than the normal incrementing of the program counter to the next instruction.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$EA12

ORA – Logical Inclusive OR

A,Z,N = A|M

An inclusive OR is performed, bit by bit, on the accumulator contents using the contents of a byte of memory.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 set
Addressing ModeOpcodeBytesCycles
Immediate$0922
Zero Page$0523
Zero Page,X$1524
Absolute$0D34
Absolute,X$1D34 (+1 if page crossed)
Absolute,Y$1934 (+1 if page crossed)
(Indirect,X)$0126
(Indirect),Y$1125 (+1 if page crossed)

See also: ANDEOR

PHA – Push Accumulator

Pushes a copy of the accumulator on to the stack.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$4813

See also: PLA

PHP – Push Processor Status

Pushes a copy of the status flags on to the stack.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$0813

See also: PLP

PLA – Pull Accumulator

Pulls an 8 bit value from the stack and into the accumulator. The zero and negative flags are set as appropriate.

CCarry FlagNot affected
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of A is set
Addressing ModeOpcodeBytesCycles
Implied$6814

See also: PHA

PLP – Pull Processor Status

Pulls an 8 bit value from the stack and into the processor flags. The flags will take on new states as determined by the value pulled.

Processor Status after use:

CCarry FlagSet from stack
ZZero FlagSet from stack
IInterrupt DisableSet from stack
DDecimal Mode FlagSet from stack
BBreak CommandSet from stack
VOverflow FlagSet from stack
NNegative FlagSet from stack
Addressing ModeOpcodeBytesCycles
Implied$2814

See also: PHP

ROL – Rotate Left

Move each of the bits in either A or M one place to the left. Bit 0 is filled with the current value of the carry flag whilst the old bit 7 becomes the new carry flag value.

Processor Status after use:

CCarry FlagSet to contents of old bit 7
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Accumulator$2A12
Zero Page$2625
Zero Page,X$3626
Absolute$2E36
Absolute,X$3E37

See also: ASLLSRROR

ROR – Rotate Right

Move each of the bits in either A or M one place to the right. Bit 7 is filled with the current value of the carry flag whilst the old bit 0 becomes the new carry flag value.

Processor Status after use:

CCarry FlagSet to contents of old bit 0
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of the result is set
Addressing ModeOpcodeBytesCycles
Accumulator$6A12
Zero Page$6625
Zero Page,X$7626
Absolute$6E36
Absolute,X$7E37

See also ASLLSRROL

RTI – Return from Interrupt

The RTI instruction is used at the end of an interrupt processing routine. It pulls the processor flags from the stack followed by the program counter.

Processor Status after use:

CCarry FlagSet from stack
ZZero FlagSet from stack
IInterrupt DisableSet from stack
DDecimal Mode FlagSet from stack
BBreak CommandSet from stack
VOverflow FlagSet from stack
NNegative FlagSet from stack
Addressing ModeOpcodeBytesCycles
Implied$4016

RTS – Return from Subroutine

The RTS instruction is used at the end of a subroutine to return to the calling routine. It pulls the program counter (minus one) from the stack.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$6016

See also: JSR

SBC – Subtract with Carry

A,Z,C,N = A-M-(1-C)

This instruction subtracts the contents of a memory location to the accumulator together with the not of the carry bit. If overflow occurs the carry bit is clear, this enables multiple byte subtraction to be performed.

Processor Status after use:

CCarry FlagClear if overflow in bit 7
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagSet if sign bit is incorrect
NNegative FlagSet if bit 7 set
Addressing ModeOpcodeBytesCycles
Immediate$E922
Zero Page$E523
Zero Page,X$F524
Absolute$ED34
Absolute,X$FD34 (+1 if page crossed)
Absolute,Y$F934 (+1 if page crossed)
(Indirect,X)$E126
(Indirect),Y$F125 (+1 if page crossed)

See also: ADC

SEC – Set Carry Flag

C = 1

Set the carry flag to one.

CCarry FlagSet to 1
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$3812

See also: CLC

SED – Set Decimal Flag

D = 1

Set the decimal mode flag to one.

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagSet to 1
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$F812

See also: CLD

SEI – Set Interrupt Disable

I = 1

Set the interrupt disable flag to one.

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableSet to 1
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$7812

See also: CLI

STA – Store Accumulator

M = A

Stores the contents of the accumulator into memory.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Zero Page$8523
Zero Page,X$9524
Absolute$8D34
Absolute,X$9D35
Absolute,Y$9935
(Indirect,X)$8126
(Indirect),Y$9126

See also: STXSTY

STX – Store X Register

M = X

Stores the contents of the X register into memory.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Zero Page$8623
Zero Page,Y$9624
Absolute$8E34

See also: STASTY

STY – Store Y Register

M = Y

Stores the contents of the Y register into memory.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Zero Page$8423
Zero Page,X$9424
Absolute$8C34

See also: STASTX

TAX – Transfer Accumulator to X

X = A

Copies the current contents of the accumulator into the X register and sets the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if X = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of X is set
Addressing ModeOpcodeBytesCycles
Implied$AA12

See also: TXA

TAY – Transfer Accumulator to Y

Y = A

Copies the current contents of the accumulator into the Y register and sets the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if Y = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of Y is set
Addressing ModeOpcodeBytesCycles
Implied$A812

See also: TYA

TSX – Transfer Stack Pointer to X

X = S

Copies the current contents of the stack register into the X register and sets the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if X = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of X is set
Addressing ModeOpcodeBytesCycles
Implied$BA12

See also: TXS

TXA – Transfer X to Accumulator

A = X

Copies the current contents of the X register into the accumulator and sets the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of A is set
Addressing ModeOpcodeBytesCycles
Implied$8A12

See also: TAX

TXS – Transfer X to Stack Pointer

S = X

Copies the current contents of the X register into the stack register.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagNot affected
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagNot affected
Addressing ModeOpcodeBytesCycles
Implied$9A12

See also: TSX

TYA – Transfer Y to Accumulator

A = Y

Copies the current contents of the Y register into the accumulator and sets the zero and negative flags as appropriate.

Processor Status after use:

CCarry FlagNot affected
ZZero FlagSet if A = 0
IInterrupt DisableNot affected
DDecimal Mode FlagNot affected
BBreak CommandNot affected
VOverflow FlagNot affected
NNegative FlagSet if bit 7 of A is set
Addressing ModeOpcodeBytesCycles
Implied$9812

See also: TAY

 << BackHomeContentsNext >>

This page was last updated on 17th February, 2008